SYNOPSYS: TECHNICAL ENGINEER INTERN
Eligibility:
- A relevant Graduate/Post Graduate degree in EE/EC/VLSI
- Desire to learn and explore new technologies.
- Solid English communication and interpersonal skills
- General knowledge base in digital systems and microelectronics generally acquired from a college degree or equivalent course training.
- Familiarity of Verilog hardware description language and Timing methodologies.
- Familiarity of ASIC design flows.
Apply through the link here: CLICK HERE
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